Read and write barriers mediate access to the heap allowing the collector to control and monitor mutator actions. For this reason, barriers are a powerful tool in the design of any heap management algorithm, but the prevailing wisdom is that they impose significant costs. However, changes in hardware and workloads make these costs a moving target. Here, we measure the cost of a range of useful barriers on a range of modern hardware and workloads. We confirm some old results and overturn others. We evaluate the microarchitectural sensitivity of barrier performance and the differences among benchmark suites. We also consider barriers in context, focusing on their behavior when used in combination, and investigate a known pathology and evaluate solutions. Our results show that read and write barriers have average overheads as low as 5.4% and 0.9% respectively. We find that barrier overheads are more exposed on the workload provided by the modern DaCapo benchmarks than on old SPECjvm98 benchmarks. Moreover, there are differences in barrier behavior between in-order and out-of-order machines, and their respective memory subsystems, which indicate different barrier choices for different platforms. These changing costs mean that algorithm designers need to reconsider their design choices and the nature of their resulting algorithms in order to exploit the opportunities presented by modern hardware.
@inproceedings{Yang+2012ISMM,
author = {Yang, Xi and Blackburn, Stephen M. and Frampton, Daniel and Hosking, Antony L.},
title = {Barriers Reconsidered, Friendlier Still!},
booktitle = {ACM SIGPLAN International Symposium on Memory Management},
series = {ISMM},
year = {2012},
pages = {37--48},
month = {June},
address = {Beijing, China},
doi = {10.1145/2258996.2259004},
acm = {http://dl.acm.org/authorize?N93653},
gscholar = {15}
}